1. Field
Exemplary embodiments of the present invention relate to a semiconductor device and a semiconductor system, and more particularly, to a technique for preventing data from being redundantly stored when data stored in a non-volatile storage unit of a semiconductor device is stored in a storage unit of the semiconductor device.
2. Description of the Related Art
FIG. 1 is a block diagram illustrating a repair operation in a known semiconductor memory device.
Referring to FIG. 1, the semiconductor memory device includes a cell array 110 configured to include a plurality of memory cells, a row circuit 120 configured to activate a word line in response to a row address R_ADD, and a column circuit 130 configured to access (read or write) data of a bit line selected in response to a column address C_ADD.
A row fuse circuit 140 stores a row address, corresponding to a defective memory cell within the cell array 110, as a repair row address REPAIR_R_ADD. A row comparison unit 150 compares the repair row address REPAIR_R_ADD, stored in the row fuse circuit 140, with the row address R_ADD received from the outside of the memory device. When the repair row address REPAIR_R_ADD is identical to the row address R_ADD, the row comparison unit 150 controls the row circuit 120 to activate a redundancy word line designated by the repair row address REPAIR_R_ADD instead of the word line designated by the row address R_ADD.
A column fuse circuit 150 stores a column address, corresponding to the defective memory cell within the cell array 110, as a repair column address REPAIR_C_ADD. A column comparison unit 170 compares the repair column address REPAIR_C_ADD, stored in the column fuse circuit 160, with the column address C_ADD received from the outside of the memory device. When the repair column address REPAIR_C_ADD is identical to the column address C_ADD, the column comparison unit 170 controls the column circuit 130 to access a redundancy bit line designated by the repair column address REPAIR_C_ADD instead of the bit line designated by the column address C_ADD.
Laser fuses are used in the fuse circuits 140 and 160 of FIG. 1. The laser fuse stores ‘high’ or ‘row’ data depending on whether or not the laser fuse has been cut. The laser fuse may be programmed in a wafer state but may not be programmed after a wafer is mounted within a package. Furthermore, it is impossible to design the laser fuse small due to the limit of a pitch. A fuse that may be used to overcome this disadvantage is an E-fuse. The E-fuse may be formed of a transistor or a capacitor-resistor. When the E-fuse is formed of a transistor, data is stored by changing resistance between a gate and drain/source of the transistor.
FIG. 2 is a diagram illustrating an E-fuse formed of a transistor operating as a resistor or a capacitor.
As illustrated in FIG. 2, the E-fuse includes a transistor T. When a voltage against which the transistor T may withstand is applied to a gate G of the transistor T, the E-fuse operates as a capacitor C. Accordingly, current does not flow between the gate G and drain/source D/S of the transistor T. When a high voltage against which the transistor T may not withstand is applied to the gate G, a gate oxide of the transistor T is broken and thus the gate G and the drain/source D/S are shorted. As a result, the E-fuse operates as a resistor R. Accordingly, current flows between the gate G and the drain/source D/S.
The data of the E-fuse is recognized based on a resistance value between the gate G and the drain/source D/S of the E-fuse. To recognize the data of the E-fuse, either (1) a first method of directly recognizing the data of the E-fuse by increasing a size of the transistor T without an additional sensing operation or (2) a second method of recognizing the data of the E-fuse by sensing current flowing into the transistor T using an amplifier may be used. The two methods have a limitation in view of a circuit area because the size of the transistor T forming the E-fuse must be designed large or the amplifier for amplifying the data must be provided in each E-fuse.
To apply an E-fuse to the fuse circuits 140 and 160 of FIG. 1 is difficult due to the above-described issues regarding the circuit area. Accordingly, a method of configuring E-fuses in an array form so that the total area may be reduced because amplifiers may be shared and performing a repair operation using data stored in the E-fuse array is being described.